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 STGD5NB120SZ-1
N-CHANNEL 5A - 1200V IPAK INTERNALLY CLAMPED PowerMESHTM IGBT
TYPE STGD5NB120SZ-1
s s s s s
VCES 1200 V
VCE(sat) < 2.0 V
IC 5A
HIGH INPUT IMPEDANCE (VOLTAGE DRIVEN) LOW ON-VOLTAGE DROP (Vcesat) HIGHT CURRENT CAPABILITY OFF LOSSES INCLUDE TAIL CURRENT HIGH VOLTAGE CLAMPING FEATURES IPAK
3 2 1
DESCRIPTION Using the latest high voltage technology based on a patented strip layout, STMicroelectronics has designed an advanced family of IGBTs, the PowerMESHTM IGBTs, with outstanding performances. The suffix "S" identifies a family optimized achieve minimum on-voltage drop for low frequency applications (<1kHz). The built in collector-gate zener exibits a very precise active clamping.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS s LIGHT DIMMER s INRUSH CURRENT LIMITATION
ORDERING INFORMATION
SALES TYPE STGD5NB120SZ-1 MARKING GD5NB120SZ PACKAGE IPAK PACKAGING TUBE
July 2003
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STGD5NB120SZ-1
ABSOLUTE MAXIMUM RATINGS
Symbol VCES VECR VGE IC IC ICM ( ) PTOT Parameter Collector-Emitter Voltage (VGS = 0) Emitter-Collector Voltage Gate-Emitter Voltage Collector Current (continuous) at TC = 25C Collector Current (continuous) at TC = 100C Collector Current (pulsed) Total Dissipation at TC = 25C Derating Factor Eas (1) Tstg Tj Single Pulse Avalanche Energy at Tj = 25C Single Pulse Avalanche Energy at Tj = 100C Storage Temperature Operating Junction Temperature range Value 1200 20 20 10 5 20 55 0.4 10 7 -65 to 150 150 Unit V V V A A A W W/C mJ mJ C C
( ) Pulse width limited by safe operating area (1) VCE = 50 V , IAV = 3.3 A
THERMAL DATA
Rthj-case Rthj-amb Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max 2.27 100 C/W C/W
ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF
Symbol VBR(CES) ICES IGES Parameter Collector-Emitter Breakdown Voltage Collector cut-off Current (VGE = 0) Gate-Emitter Leakage Current (VCE = 0) Test Conditions IC = 10 mA, VGE = 0 V VCE = 900 V VCE = 900 V, Tj = 125 C VGE = 20V , VCE = 0 V Min. 1200 50 250 100 Typ. Max. Unit V A A nA
ON
Symbol VGE(th) VGE VCE(sat) Parameter Gate Threshold Voltage Gate Emitter Voltage Collector-Emitter Saturation Voltage Test Conditions VCE = VGE, IC = 250 A VCE =2.5 V, IC = 2 A, Tj = 25/125C VGE = 15V, IC = 5 A VGE = 15V, IC = 5 A, Tj =125C 1.3 Min. 2 Typ. Max. 5 6.5 2.0 Unit V V V V
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DYNAMIC
Symbol gfs Cies(*) Coes(*) Cres(*) Rg Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance Test Conditions VCE = 25 V , IC = 5 A VCE = 25V, f = 1 MHz, VGE = 0V Min. Typ. 5 430 40 7 4 Max. Unit S pF pF pF K
Note: (*) Without Rg Gate Resistance
FUNCTIONAL TEST
Symbol Ias ICL Parameter Unclamped inductive switching current Latching Current Test Conditions VCC = 50 V, L= 1.8 mH Tstart = 25C, Rdrive = 1K VCLAMP = 960 V, Tj =125C Rdrive = 1K Min. 3.3 10 Typ. Max. Unit A A
ELECTRICAL CHARACTERISTICS SWITCHING ON
Symbol td(on) tr (di/dt)on Eon Parameter Delay Time Rise Time Turn-on Current Slope Turn-on Switching Losses Test Conditions IC = 5 A , VCC = 960 V VGE = 15 V , Rdrive = 1K Tj = 25C ICC = 5 A , VCC = 960 V VGE = 15 V , Rdrive = 1K Tj = 125C Min. Typ. 690 160 39 2.64 Max. Unit ns ns A/s mJ
SWITCHING OFF
Symbol tc tr(Voff) td(off) tf Eoff(**) tc tr(Voff) td(off) tf Eoff(**) Parameter Cross-over Time Off Voltage Rise Time Delay Time Fall Time Turn-off Switching Loss Cross-over Time Off Voltage Rise Time Delay Time Fall Time Turn-off Switching Loss Test Conditions IC = 5 A , VCC = 960 V VGE = 15 V , Rdrive = 1K Tj = 25C Min. Typ. 4 2.2 12.1 1.13 9 5 2.2 12.1 2 10.2 Max. Unit
s s s s mJ s s s s mJ
IC = 5 A , VCC = 960 V VGE = 15 V , Rdrive = 1K Tj = 125C
(**) Losses include Also the Tail (Jedec Standardization)
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STGD5NB120SZ-1
Output Characteristics Transfer Characteristics
Transconductance
Normalized Collector-Emitter On Voltage vs Temp.
Collector-Emitter On Voltage vs Collector Current Collector-Emitter On Voltage vs Temperature
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STGD5NB120SZ-1
Gate Threshold vs Temperature Breakdown Voltage vs Temperature
Capacitance Variations
Gate Charge vs Gate-Emitter Voltage
Total Switching Losses vs Gate Resistance
Total Switching Losses vs Temperature
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Total Switching Losses vs Collector Current Thermal Impedance
Turn-Off SOA
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Fig. 1: Gate Charge test Circuit Fig. 2: Test Circuit For Inductive Load Switching
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STGD5NB120SZ-1
TO-251 (IPAK) MECHANICAL DATA
DIM. MIN. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 2.2 0.9 0.7 0.64 5.2 mm TYP. MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033
H
A
C C2
L2 D
B3
B6
A1
L
=
=
3
B5
B
A3
=
B2
=
G
=
E
L1
1
2
=
0068771-E
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STGD5NB120SZ-1
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com
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